The present invention relates generally to systems and methods for frequency margin testing of components of an electronic system, such as a computer system. More particularly, the invention relates to the use of an I2C programmable clock generator to enable frequency variation under the control of a Baseboard Management Controller (BMC).
Electronic systems often include a myriad of subsystems and components that require monitoring and/or testing during development and/or manufacturing while in use in the field to ensure their proper operation within specified operating conditions. Many of these components typically exhibit subtle failures at margins or extremes of such specified operating conditions. Hence, it is desirable to test the components at these margins, herein referred to as margin testing, to evaluate their reliability. For example, it may desirable to test a component by varying one or more of its operating parameters, such as, temperature, applied voltage, and/or driving frequency, over a selected range to elicit the system's response to parameter variability, especially at the extremes of specified operating conditions. Margin testing can also ensure that a particular design can be readily adapted to evolving changes in manufacturing processes.
A number of systems and methods for providing such margin testing are known in the art. For example, in one such conventional method for frequency margin testing, pull-up/pull-down resistors utilized to “stap” a frequency generator's input signals are replaced in order to vary the generator's output frequency. Such physical replacement of resistors may, however, lead to accidental damage of the system under test (SUT) and/or unreliable test results. Moreover, such a method is time consuming and can not be readily integrated to an automated test environment.
In another conventional approach for frequency margin testing, a plurality of jumpers or switches are employed to modify resistor values associated with frequency select input pins of a frequency generator in a computer system under test in order to obtain desired frequencies for testing. This approach is not only time consuming but it also requires the use of valuable board space for incorporation of jumpers and switches. Further, this approach suffers from low frequency resolution.
In yet another traditional method for frequency margin testing, individual crystal/oscillator components in a system under test are replaced to obtain one or more desired frequencies. This method is also an invasive approach that suffers from shortcomings similar to those described above with regard to other traditional approaches In addition, this method is particularly costly as it requires procuring additional clock components for each frequency point of interest.
Other exemplary traditional approaches for frequency margin testing include the use of analog voltage-offset variable clock synthesizers, which suffer from low accuracy and precision, low granularity, and increased component complexity, and the use of external wave-function generators, which is an invasive method that requires expensive external test equipment and is prone to clock jitter and excessive noise coupling.
Hence, there is a need for enhanced systems and methods for readily performing frequency margin testing of components of a computer device. There is also a need for such systems and methods that allow margin frequency testing without a need for physical modifications of the device under test.